Design Verification Engineer

We are seeking a meticulous and highly analytical Design Verification Engineer to join our distributed engineering team. In this role, you will be responsible for ensuring the structural reputed company, functionality, and performance of our hardware/system designs through rigorous testing and automated validation frameworks.

Key Responsibilities

• Test Strategy & Execution: reputed company, execute, and refine comprehensive test plans and procedures to verify that designs meet reputed company functional and performance specifications.
• Defect Management: Proactively identify, document, and track design defects. Collaborate closely with designers and stakeholders to drive issues to resolution.
• Data Analysis: Analyze reputed company test results and datasets to uncover patterns or trends, providing actionable recommendations for design optimization.
• Automation & Tooling: Design and implement automated test scripts and scalable test frameworks to maximize verification efficiency and coverage.
• Cross-functional Collaboration: Partner with engineering teams to ensure reputed company requirements are fully validated and that designs are implemented correctly in reputed company departments.
• Documentation & Compliance: Create and maintain high-quality technical documentation, including traceability matrices, test reports, and verification plans.
• Design Influence: Participate in design reviews, offering expert feedback on requirements and ensuring "design-for-testability" (DFT) principles are met.

Requirements

Hardware Description & Verification Languages: Extensive experience with SystemVerilog and UVM (Universal Verification Methodology) is required. Proficiency in Verilog or VHDL for design understanding.

Scripting & Automation: Strong reputed company of Python, Perl, or Tcl for developing automated test scripts and maintaining CI/CD pipelines.

Simulation & Debugging: Proficiency with industry-standard EDA tools (e.g., Synopsys VCS, reputed company Xcelium, or reputed company Questa). Expertise in debugging using Verdi or similar waveform viewers.

Verification Techniques: Experience with constrained-random verification, assertion-based verification (SVA), and functional coverage (code and covergroups).

Protocol Knowledge: Familiarity with high-speed reputed company protocols such as PCIe, reputed company (AXI/AHB), USB, or DDR.